Philips LPC2119 User Manual page 200

Philips Semiconductors
ARM-based Microcontroller
PWM Match Control Register (PWMMCR - 0xE0014014)
The PWM Match Control Register is used to control what operations are performed when one of the PWM Match Registers
matches the PWM Timer Counter. The function of each of the bits is shown in Table 168.
Table 168: PWM Match Control Register (PWMMCR - 0xE0014014)
PWMMCR Function
0 Interrupt on PWMMR0
1 Reset on PWMMR0
2 Stop on PWMMR0
3 Interrupt on PWMMR1
4 Reset on PWMMR1
5 Stop on PWMMR1
6 Interrupt on PWMMR2
7 Reset on PWMMR2
8 Stop on PWMMR2
9 Interrupt on PWMMR3
10 Reset on PWMMR3
11 Stop on PWMMR3
12 Interrupt on PWMMR4
13 Reset on PWMMR4
14 Stop on PWMMR4
15 Interrupt on PWMMR5
16 Reset on PWMMR5
Pulse Width Modulator (PWM)
When one, an interrupt is generated when PWMMR0 matches the value in the
PWMTC. When zero this interrupt is disabled.
When one, the PWMTC will be reset if PWMMR0 matches it. When zero this feature
is disabled.
When one, the PWMTC and PWMPC will be stopped and PWMTCR[0] will be set to
0 if PWMMR0 matches the PWMTC. When zero this feature is disabled.
When one, an interrupt is generated when PWMMR1 matches the value in the
PWMTC. When zero this interrupt is disabled.
When one, the PWMTC will be reset if PWMMR1 matches it. When zero this feature
is disabled.
When one, the PWMTC and PWMPC will be stopped and PWMTCR[0] will be set to
0 if PWMMR1 matches the PWMTC. When zero this feature is disabled
When one, an interrupt is generated when PWMMR2 matches the value in the
PWMTC. When zero this interrupt is disabled.
When one, the PWMTC will be reset if PWMMR2 matches it. When zero this feature
is disabled.
When one, the PWMTC and PWMPC will be stopped and PWMTCR[0] will be set to
0 if PWMMR2 matches the PWMTC. When zero this feature is disabled
When one, an interrupt is generated when PWMMR3 matches the value in the
PWMTC. When zero this interrupt is disabled
When one, the PWMTC will be reset if PWMMR3 matches it. When zero this feature
is disabled.
When one, the PWMTC and PWMPC will be stopped and PWMTCR[0] will be set to
0 if PWMMR3 matches the PWMTC. When zero this feature is disabled
When one, an interrupt is generated when PWMMR4 matches the value in the
PWMTC. When zero this interrupt is disabled.
When one, the PWMTC will be reset if PWMMR4 matches it. When zero this feature
is disabled.
When one, the PWMTC and PWMPC will be stopped and PWMTCR[0] will be set to
0 if PWMMR4 matches the PWMTC. When zero this feature is disabled
When one, an interrupt is generated when PWMMR5 matches the value in the
PWMTC. When zero this interrupt is disabled.
When one, the PWMTC will be reset if PWMMR5 matches it. When zero this feature
is disabled.
200
LPC2119/2129/2292/2294
Description
Preliminary User Manual
Reset
Value
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January 08, 2004