Sony BVW-55 Maintenance Manual page 566

IC
CXB1342R (SONY)
SERIAL DIGITAL INTERFACE TRANSMISSION DECODER
—TOP VIEW—
49
50
51
V
CC2
52
53
54
55
56
57
58
59 V
CC2
60
61
GND
62 GND
63
V
CC2
64
PIN PIN
I/O SIGNAL I/O
NO. NO.
1 — V 17 O
CC2
2 O SYNC 18 O
3 — NC 19 —
4 — NC 20 —
5 — GND 21 I
6 I TEST 22 I
7 I SCKX 23 —
8 I SCKY 24 I
9 I ADS 25 —
10 I RESET 26 O
11 — V 27 O
CCL
12 — V 28 —
CCQ
13 I AIX 29 I
14 I AIY 30 I
15 I AGCR 31 I
16 O AGCL 32 I
INPUT
ADS : TEST
AGCR : AGC REFERENCE VOLTAGE
AIX, AIY : SERIAL DATA
BCAP : EXTERNAL CAPACITOR FOR VCO
DIX, DIY : TEST
FSR0 - FSR3 : EXTERNAL RESISTOR FOR SETTING THE VCO FREE-RUN FREQUENCY
ICP : CHARGE PUMP CURRENT SETTING
MDS : TEST
MOD0, MOD1 : VCO RATE SELECT
RESET : PLL RESET
SCKX, SCKY : TEST
TEST : TEST
THRU : TEST
OUTPUT
AGCL : EXTERNAL CAPACITOR FOR PEAK DETECTION
CPX, CPY : CHARGE PUMP
D0 - D9 : PARALLEL CLOCK
DPR : PLL LOCK STATUS
EVR : PARALLEL CLOCK
LST : PLL LOCK STATUS
MON0, MON1 : EQUALIZER MONITOR
PCK : PARALLEL CLOCK
SX, SY : EXTERNAL RESISTOR FOR SERIAL DIFFERENTIAL OUTPUT
SYNC : PLL LOCK STATUS
2-16
32
31
30
29
V 28
CCL
27
26
25
GND
24
V 23
CCL
22
21
20
GND
V 19
CCQ
18
17
PIN PIN
SIGNAL I/O SIGNAL I/O SIGNAL
NO. NO.
MON0 33 — GND 49 — V
CC2
MON1 34 I MOD0 50 O D9
V 35 I MOD1 51 O D8
CCQ
GND 36 I BCAP 52 O D7
DIX 37 O LST 53 O D6
DIY 38 O DPR 54 O EVR
V 39 — GND 55 O D5
CCL
ICP 40 — GND 56 O D4
GND 41 O SX 57 O D3
CPX 42 — V 58 O D2
CCS
CPY 43 O SY 59 — V
CC2
V 44 — V 60 O D1
CCL CCL
FSR0 45 I MDS 61 O D0
FSR1 46 I THRU 62 — GND
FSR2 47 — V 63 O PCK
CC2
FSR3 48 — GND 64 — GND
46
THRU
DE-SCRAMBLER
NRZI - NRZ
RE-SCRAMBLER
SERIAL CLK
6
TEST
_ _
7
SCKX
8
SCKY
REGENERATED DATA
21
DIX
22
DIY
9
ADS
LOCK
13 DET
AIX
14 DATA
AIY
DET
15
CABLE
PHASE
AGCR
16
EQUALIZER
AGCL
17
MON0
RESET
18
MON1 CHARGE
2
SYNC TIMING
DETECTOR GENERATOR
63
PARALLEL 61
CLK
30-BIT
60
58
57
56
55
53
52
51
50
54
43
41
38
37
_
1/2
COMP
45
35
FREE RUN SET
VCO 34
PUMP
BVW-55
SYNC
PCK
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
EVR
SY
SX
DPR
LST
MDS
MOD1
MOD0