Sony BVW-55 Maintenance Manual page 573

CXD2310AR-T4 (SONY)
C-MOS 10-BIT 20 MSPS VIDEO A/D CONVERTER
—TOP VIEW—
TSTR 37
COURSE
CONPARATE
& ENCODE
AT 38
S/H
VIN 39
AMP.
+
_
+
DAC
40 NC
CAL 41
TS 42
43 A-GND AMP.
(x 8)
44 A-GND
45 D-V
DD
FINE
46 NC COMPARATE
& ENCODE
47 NC
48 D-GND
FINE LATCH
INPUT
: CALIBRATION PULSE INPUT
CAL
: CHIP ENABLE
CE
: CLOCK
CLK
: OUTPUT (D0 - D8) INVERSION
LINV
: OUTPUT (D9) INVERSION
MINV
: DIGITAL DATA OUTPUT ENABLE
OE
: CALIBRATION CIRCUIT RESET
RESET
: OUTPUT DATA (D5 - D9) SELECT FOR CALIBRATION (4-CLOCK)
SEL
HIGH ; THROUGH OUTPUT, OW ; DATA FIXED AS WITH D0 - D4
: TEST SIGNAL INPUT
TIN
: TEST MODE
TMOD
: TEST SIGNAL INPUT
TS
: TEST SIGNAL INPUT
TSTR
: REFERENCE BOTTOM VOLTAGE
VRB
: REFERENCE TOP VOLTAGE
VRT
OUTPUT
: TEST SIGNAL OUTPUT
AT
: DIGIRAL DATA OUTPUT
D0 - D9
: TEST PIN
TO
BVW-55
CE
24
OE
23
TIMING
22 CLK
GEN.
21 MINV
20 LINV
19 TMOD
AV 18
DD
17 SEL
DGND 16
RESET
15
14 TIN
13 TO
COURSE CORRECTION
& LATCH
DO
Y0 - 9
DO FLAG
DET.
EDGE
CORRELATE
DET.
GUARD BAND
FLAG DET.
CXD2209Q (SONY)
C-MOS DIGITAL EDGE NOISE REDUCER
—TOP VIEW—
65
66
67
68
69
70
71
72
73 V
DD
74
75
76
77
78
79
80
PIN PIN
I/O SIGNAL I/O SIGNAL
No. No.
1 I Y0 21 I DT
2 — GND 22 I D0
3 I CK 23 — GND
4 I BID 24 I D1
5 I CBLK 25 I ENS1
6 I VBLK 26 I DNS0
7 I H SYN 27 I MOD1
8 I VISC EX 28 I MOD2
9 I X30 29 I MODS
10 I SW1 30 — NC
11 I GRSW 31 — NC
12 — GND 32 — NC
13 I ENROFF 33 — V
DD
14 I ESROFF 34 — NC
15 I DEF 35 — NC
16 I MUTE1 36 — NC
17 I MUTE3 37 — NC
18 I DIG IF 38 — NC
19 I 3S4 39 — NC
20 I APOFF 40 I OE1
IH
DELAY LINE
EDGE NOISE
REDUCER ENR
GRAY
ON
SUBSTITUTION
CONTOROL
BLOCK
40
39
NC
NC 38
NC 37
NC 36
35
NC
NC 34
33
V
DD
32
NC
31
NC
30
NC
29
28
27
26
25
PIN PIN
I/O SIGNAL I/O SIGNAL
No. No.
41 O YO0 61 O DY8
42 — GND 62 O DY9
43 O YO1 63 — GND
44 O YO2 64 I OE2
45 O YO3 65 I DTSTB
46 O YO4 66 I SLD
47 O YO5 67 I SDATA
48 O YO6 68 I SCK
49 O YO7 69 O STP
50 O YO8 70 O S OUT
51 O YO9 71 I Y9
52 — GND 72 I Y8
53 O DY0 73 — V
DD
54 O DY1 74 I Y7
55 O DY2 75 I Y6
56 O DY3 76 I Y5
57 O DY4 77 I Y4
58 O DY5 78 I Y3
59 O DY6 79 I Y2
60 O DY7 80 I Y1
SIN X/X
BLANKING
COMPENSATE
BLANK PULSE
EDGE
SUB CARRIER
REJECT
NORMAL
PLAY
IC
YO0 - 9
DY0 - 9
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