Hitachi SH7750 Programming Manual page 186

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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Table 8.3
Execution Cycles (cont)
Functional
Category
No.
Instruction
System
151
STC
control
152
STC
instructions
153
STC
154
STC
155
STC
156
STC
157
STC.L
158
STC.L
159
STC.L
160
STC.L
161
STC.L
162
STC.L
163
STC.L
164
STC.L
165
STS
166
STS
167
STS
168
STS.L
169
STS.L
170
STS.L
Single-
171
FLDI0
precision
172
FLDI1
floating-point
173
FMOV
instructions
174
FMOV.S
175
FMOV.S
176
FMOV.S
177
FMOV.S
178
FMOV.S
179
FMOV.S
180
FLDS
181
FSTS
Rev. 2.0, 03/99, page 172 of 396
Instruc-
tion
Group
GBR,Rn
CO
Rp_BANK,Rn
CO
SR,Rn
CO
SSR,Rn
CO
SPC,Rn
CO
VBR,Rn
CO
DBR,@-Rn
CO
SGR,@-Rn
CO
GBR,@-Rn
CO
Rp_BANK,@-Rn
CO
SR,@-Rn
CO
SSR,@-Rn
CO
SPC,@-Rn
CO
VBR,@-Rn
CO
MACH,Rn
CO
MACL,Rn
CO
PR,Rn
CO
MACH,@-Rn
CO
MACL,@-Rn
CO
PR,@-Rn
CO
FRn
LS
FRn
LS
FRm,FRn
LS
@Rm,FRn
LS
@Rm+,FRn
LS
@(R0,Rm),FRn
LS
FRm,@Rn
LS
FRm,@-Rn
LS
FRm,@(R0,Rn)
LS
FRm,FPUL
LS
FPUL,FRn
LS
Execu-
Issue
tion
Rate
Latency
Pattern Stage Start Cycles
2
2
#20
2
2
#20
2
2
#20
2
2
#20
2
2
#20
2
2
#20
2
2/2
#22
3
3/3
#23
2
2/2
#22
2
2/2
#22
2
2/2
#22
2
2/2
#22
2
2/2
#22
2
2/2
#22
1
3
#30
1
3
#30
2
2
#26
1
1/1
#31
1
1/1
#31
2
2/2
#27
1
0
#1
1
0
#1
1
0
#1
1
2
#2
1
1/2
#2
1
2
#2
1
1
#2
1
1/1
#2
1
1
#2
1
0
#1
1
0
#1
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