Hitachi SH7750 Programming Manual page 286

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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12. This instruction transfers contents of memory at address indicated by (R0 + Rm) to DRn.
13. This instruction transfers FRm contents to memory at address indicated by (R0 + Rn).
14. This instruction transfers DRm contents to memory at address indicated by (R0 + Rn).
Operation
void FMOV(int m,n)
{
FR[n] = FR[m];
pc += 2;
}
void FMOV_DR(int m,n)
{
DR[n>>1] = DR[m>>1];
pc += 2;
}
void FMOV_STORE(int m,n)
{
store_int(FR[m],R[n]);
pc += 2;
}
void FMOV_STORE_DR(int m,n)
{
store_quad(DR[m>>1],R[n]);
pc += 2;
}
void FMOV_LOAD(int m,n)
{
load_int(R[m],FR[n]);
pc += 2;
}
void FMOV_LOAD_DR(int m,n)
{
load_quad(R[m],DR[n>>1]);
pc += 2;
}
void FMOV_RESTORE(int m,n)
{
Rev. 2.0, 03/99, page 272 of 396
/* FMOV FRm,FRn */
/* FMOV DRm,DRn */
/* FMOV.S FRm,@Rn */
/* FMOV DRm,@Rn */
/* FMOV.S @Rm,FRn */
/* FMOV @Rm,DRn */
/* FMOV.S @Rm+,FRn */

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