Hitachi SH7750 Programming Manual page 298

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
Hide thumbs Also See for SH7750:
Table of Contents

Advertisement

{
union {
float f;
int l;
}
dstf,tmpf;
union {
double d;
int l[2];
}
dstd,tmpd;
union {
int double x;
int l[4];
}
tmpx;
if(FPSCR_PR == 0) {
tmpf.f = FR[n]; /* save destination value */
dstf.f = sqrt(FR[n]); /* round toward nearest or even */
tmpd.d = dstf.f; /* convert single to double */
tmpd.d *= dstf.f;
if(tmpf.f != tmpd.d) set_I();
if((tmpf.f < tmpd.d) && (SPSCR_RM == 1))
dstf.l -= 1; /* round toward zero */
if(FPSCR & ENABLE_I) fpu_exception_trap();
else
}else {
tmpd.d = DR[n>>1]; /* save destination value */
dstd.d = sqrt(DR[n>>1]); /* round toward nearest or even */
tmpx.x = dstd.d; /* convert double to int double */
tmpx.x *= dstd.d;
if(tmpd.d != tmpx.x) set_I();
if((tmpd.d < tmpx.x) && (SPSCR_RM == 1)) {
dstd.l[1] -= 1; /* round toward zero */
if(dstd.l[1] == 0xffffffff) dstd.l[0] -= 1;
}
if(FPSCR & ENABLE_I) fpu_exception_trap();
else
}
}
Rev. 2.0, 03/99, page 284 of 396
FR[n] = dstf.f;
DR[n>>1] = dstd.d;

Advertisement

Table of Contents
loading

Table of Contents