Hitachi SH7750 Programming Manual page 364

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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Operation
RTE( ) /* RTE */
{
unsigned int temp;
temp=PC;
SR=SSR;
PC=SPC;
Delay_Slot(temp+2);
}
Example
RTE
ADD
#8,R14
Note: In a delayed branch, the actual branch operation occurs after execution of the slot
instruction, but instruction execution (register updating, etc.) is in fact performed in
delayed branch instruction → delay slot instruction order. For example, even if the register
holding the branch destination address is modified in the delay slot, the branch destination
address will still be the register contents prior to the modification.
Rev. 2.0, 03/99, page 350 of 396
;Return to original routine.
;Executed before branch.

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