Hitachi SH7750 Programming Manual page 283

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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FMAC Special Cases
FRn
FR0
+Norm
Norm
Norm
MAC
0
INF
+0
Norm
MAC
0
INF
–0
+Norm
MAC
–Norm
+0
–0
INF
+INF
+Norm
+INF
–Norm
0
+INF
–INF
Invalid
–INF
+Norm
–INF
–Norm
0
+INF
Invalid
–INF
–INF
Denorm
Norm
0
INF
!sNaN Denorm
qNaN
0
INF
Norm
!sNaN
qNaN
All types sNaN
SNaN all types
Note: When DN = 1, the value of a denormalized number is treated as 0.
-Norm
+0
INF
Invalid
INF
Invalid
+0
–0
+0
–0
+0
–0
+0
–0
INF
Invalid
Invalid
+INF
Invalid
Invalid
Invalid
FRm
–0
+INF
–INF
INF
Invalid
INF
+0
Invalid
INF
–0
+INF
–INF
+0
–INF
+INF
–0
Invalid
+0
INF
Invalid
+INF
Invalid
+INF
+INF
–INF
–INF
–INF
Invalid
Invalid
Invalid
Rev. 2.0, 03/99, page 269 of 396
Denorm qNaN
sNaN
Error
qNaN
Invalid

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