Dmuls.l - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.20

DMULS.L

Signed Double-Length
Multiplication
Format
DMULS.L Rm,Rn
Description
This instruction performs 32-bit multiplication of the contents of general register Rn by the
contents of Rm, and stores the 64-bit result in the MACH and MACL registers. The multiplication
is performed as a signed arithmetic operation.
Operation
DMULS(long m, long n)
{
unsigned long RnL,RnH,RmL,RmH,Res0,Res1,Res2;
unsigned long temp0,temp1,temp2,temp3;
long tempm,tempn,fnLmL;
tempn=(long)R[n];
tempm=(long)R[m];
if (tempn<0) tempn=0-tempn;
if (tempm<0) tempm=0-tempm;
if ((long)(R[n]^R[m])<0) fnLmL=-1;
else fnLmL=0;
temp1=(unsigned long)tempn;
temp2=(unsigned long)tempm;
RnL=temp1&0x0000FFFF;
RnH=(temp1>>16)&0x0000FFFF;
RmL=temp2&0x0000FFFF;
RmH=(temp2>>16)&0x0000FFFF;
Rev. 2.0, 03/99, page 236 of 396
Double-length
MULtiply as Signed
Summary of Operation
Signed,
Rn × Rm →
MACH, MACL
/* DMULS.L Rm,Rn */
Arithmetic Instruction
Instruction Code
0011nnnnmmmm1101 2–5
Execution
States
T Bit

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