Hitachi SH7750 Programming Manual page 390

PC+=2;
}
Possible Exceptions:
• Data TLB miss exception
• Data TLB protection violation exception
• Address error
Examples
• STS
Example 1:
MOV.L #H'12ABCDEF, R12
LDS R12, FPUL
STS FPUL, R13
Example 2:
STS FPSCR, R2
• STS.L
Example 1:
MOV.L #H'0C700148, R7
STS.L FPUL, @-R7
Example 2:
MOV.L #H'0C700154, R8
STS.L FPSCR, @-R8
Rev. 2.0, 03/99, page 376 of 396
; After executing the STS instruction:
; R13 = 12ABCDEF
; After executing the STS instruction:
; The current content of FPSCR is stored in register R2
; Before executing the STS.L instruction:
; R7 = 0C700148
; After executing the STS.L instruction:
; R7 = 0C700144, and the content of FPUL is saved at memory
; locatio\n 0C700144.
; After executing the STS.L instruction:
; The content of FPSCR is saved at memory location 0C700150.