Shar - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.85

SHAR

One-Bit Right
Arithmetic Shift
Format
SHAR
Rn
Description
This instruction arithmetically shifts the contents of general register Rn one bit to the right, and
stores the result in Rn. The bit shifted out of the operand is transferred to the T bit.
Operation
SHAR(long n) /* SHAR Rn */
{
long temp;
if ((R[n]&0x00000001)==0) T=0;
else T=1;
if ((R[n]&0x80000000)==0) temp=0;
else temp=1;
R[n]>>=1;
if (temp==1) R[n]|=0x80000000;
else R[n]&=0x7FFFFFFF;
PC+=2;
}
Example
SHAR
R0
Rev. 2.0, 03/99, page 358 of 396
SHift Arithmetic Right
Summary of Operation
MSB → Rn → T
MSB
SHAR
;Before execution R0 = H'80000001, T = 0
;After execution
Instruction Code
0100nnnn00100001 1
LSB
R0 = H'C0000000, T = 1
Shift Instruction
Execution
States
T
T Bit
LSB

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