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3.2
Register Descriptions
There are six MMU-related registers.
1. PTEH
31
2. PTEL
31 30 29 28
— — —
3. PTEA
31
4. TTB
31
5. TEA
31
6. MMUCR
31
LRUI
— indicates a reserved bit: the write value must be 0, and a read will return an undefined value.
VPN
PPN
Virtual address at which MMU exception or address error occurred
26
25
24 23
— —
URB
Figure 3.2 MMU-Related Registers
TTB
18 17 16 15
— —
URC
10 9
8
7
— —
ASID
10 9
8
7
6
5
4
3
— V SZ
PR
SZ C D SH WT
4
3
TC
10 9
8
7
6
5
4
3
SV — — — — — TI — AT
SQMD
Rev. 2.0, 03/99, page 29 of 396
0
2
1
0
2
0
SA
0
2
1
0
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