Fujitsu 8FX Hardware Manual page 10

5.1.3 Nested Interrupts .......................................................................................................... 77
5.1.4 Interrupt Processing Time ............................................................................................ 78
5.1.5 Stack Operation During Interrupt Processing ............................................................... 79
5.1.6 Interrupt Processing Stack Area ................................................................................... 80
CHAPTER 6 I/O PORT ....................................................................................... 81
6.1 Overview ............................................................................................................................ 82
6.2 Configuration and Operations ............................................................................................ 83
CHAPTER 7 TIME-BASE TIMER ........................................................................ 87
7.1 Overview ............................................................................................................................ 88
7.2 Configuration ..................................................................................................................... 89
7.3 Interrupt ............................................................................................................................. 91
7.4 Operations and Setting Procedure Example ..................................................................... 92
7.5 Register ............................................................................................................................. 95
7.5.1 Time-base Timer Control Register (TBTC) ................................................................... 96
7.6 Notes on Using Time-base Timer ...................................................................................... 98
CHAPTER 8 HARDWARE/SOFTWARE WATCHDOG TIMER .......................... 99
8.1 Overview .......................................................................................................................... 100
8.2 Configuration ................................................................................................................... 101
8.3 Operations and Setting Procedure Example ................................................................... 103
8.4 Register ........................................................................................................................... 106
8.4.1 Watchdog Timer Control Register (WDTC) ................................................................ 107
8.5 Notes on Using Watchdog Timer ..................................................................................... 109
CHAPTER 9 WATCH PRESCALER ................................................................. 111
9.1 Overview .......................................................................................................................... 112
9.2 Configuration ................................................................................................................... 113
9.3 Interrupt ........................................................................................................................... 115
9.4 Operations and Setting Procedure Example ................................................................... 116
9.5 Register ........................................................................................................................... 119
9.5.1 Watch Prescaler Control Register (WPCR) ................................................................ 120
9.6 Notes on Using Watch Prescaler ..................................................................................... 122
CHAPTER 10 WILD REGISTER FUNCTION ...................................................... 123
10.1 Overview .......................................................................................................................... 124
10.2 Configuration ................................................................................................................... 125
10.3 Operations ....................................................................................................................... 127
10.4 Registers ......................................................................................................................... 128
10.4.1 Wild Register Data Setting Registers (WRDR0 to WRDR2) ...................................... 129
10.4.2 Wild Register Address Setting Registers (WRAR0 to WRAR2) ................................. 130
10.4.3 Wild Register Address Compare Enable Register (WREN) ....................................... 131
10.4.4 Wild Register Data Test Setting Register (WROR) .................................................... 132
10.5 Typical Hardware Connection Example .......................................................................... 133
CHAPTER 11 8/16-BIT COMPOSITE TIMER ..................................................... 135
11.1 Overview .......................................................................................................................... 136
11.2 Configuration ................................................................................................................... 138
vi