Fujitsu 8FX Hardware Manual page 387

MB95630H Series
Figure 20.6-5 Count Operation in Reload Mode (External Gate Input Operation)
Count clock
Counter
Data load signal
UF bit
CNTE bit
TRG bit
TIn pin
TOn pin
■ Operation of Internal Clock Mode (One-shot Mode)
When the count enable bit (CNTE) is set to "1" and the software trigger bit (TRG) is set to "1"
or the valid edge (rising, falling or both edges selectable) specified by the operating mode
select bits (MOD[2:0]) is input to the TIn pin, the value set in the 16-bit reload timer reload
register is reloaded to the 16-bit downcounter and down-counting starts. When the count enable
bit (CNTE) and software trigger bit (TRG) are set to "1" at the same time and then counting is
enabled, the count is started simultaneously.
If the reload select bit (RELD) is "0", the 16-bit counter halts at "0xFFFF" when the 16-bit
counter underflows ("0x0000"
bit (UF) is set to "1" and if the underflow interrupt request enable bit (INTE) is "1", an
interrupt request is output.
A square waveform can be output from the TOn pin to indicate that the count is in progress.
● Software trigger operation
The count starts when the count enable bit (CNTE) is "1" and the software trigger bit (TRG) is
set to "1".
Figure 20.6-6 shows the software trigger operation in one-shot mode.
Figure 20.6-6 Count Operation in One-shot Mode (Software Trigger Operation)
Count clock
Counter
Data load signal
UF bit
CNTE bit
TRG bit
TOn pin
MN702-00009-2v0-E
-1 -1 -1
Reload data
"0xFFFF"). In this case, the underflow interrupt request flag
-1
0000 FFFF
Reload data
Wait for start trigger input
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 20 16-BIT RELOAD TIMER
20.6 Operations and Setting Procedure Example
-1 -1
0000
Reload data
-1
0000
Reload data
FFFF
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