Fujitsu 8FX Hardware Manual page 464

CHAPTER 21 MULTI-PULSE GENERATOR
21.6 Registers
[bit3:1] CPD[2:0]: Compare bits
These bits are used to compare with the RDA[2:0] bits in the 16-bit MPG output data register (upper)
(OPCUR). When the value of the CPD[2:0] bits match the value of the RDA[2:0] bits, the compare interrupt
request flag bit (CPIF) is set to "1".
bit3:1
Writing "000"
Writing "001"
Writing "010"
Writing "011"
Writing "100"
Writing "101"
Writing "110"
Writing "111"
[bit0] CMPE: Position detection compare enable bit
This bit enables or disables the compare operation in position detection.
bit0
Writing "0"
Writing "1"
442
If the RDA[2:0] bits are "000", a compare match occurs.
If the RDA[2:0] bits are "001", a compare match occurs.
If the RDA[2:0] bits are "010", a compare match occurs.
If the RDA[2:0] bits are "011", a compare match occurs.
If the RDA[2:0] bits are "100", a compare match occurs.
If the RDA[2:0] bits are "101", a compare match occurs.
If the RDA[2:0] bits are "110", a compare match occurs.
If the RDA[2:0] bits are "111", a compare match occurs.
Disables the compare operation.
Enables the compare operation.
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
Details
Details
MN702-00009-2v0-E