Fujitsu 8FX Hardware Manual page 640

APPENDIX A Instruction Overview
A.2 Special Instruction
Figure A.2-3 shows a summary of the instruction.
●
DIVU A
This instruction divides the 16-bit value in T by the unsigned 16-bit value in A, and stores the
16-bit result and the 16-bit remainder in A and T, respectively. When the value in A before
execution of instruction is "0", the Z flag becomes "1" to indicate zero-division is executed.
Note that since the instruction does not change other flags, a branch may occur depending on
the division result.
Figure A.2-4 shows a summary of the instruction.
●
XCHW A, PC
This instruction swaps the contents of A and PC, resulting in a branch to the address contained
in A before execution of the instruction. After the instruction is executed, A becomes the
address that follows the address where the operation code of "XCHW A, PC" is stored. This
instruction is effective especially when it is used in the main routine to specify a table for use
in a subroutine.
Figure A.2-5 shows a summary of the instruction.
When this instruction is executed, the content of A reaches the same value as the address where
the following instruction is stored, rather than the address where operation code of this
instruction is stored. Therefore, in Figure A.2-5, the value "0x1235" stored in A corresponds to
the address where the following operation code of "XCHW A, PC" is stored. This is why
"0x1235" is stored instead of "0x1234".
618
Figure A.2-3 MULU A
(Before executing)
A 0x5678
T 0x1234
Figure A.2-4 DIVU A
(Before executing)
A 0x1234
T 0x5678
Figure A.2-5 XCHW A, PC
(Before executing)
A 0x5678
PC 0x1234
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
(After executing)
A 0x1860
T 0x1234
(After executing)
A 0x0004
T 0x0DA8
(After executing)
A 0x1235
PC 0x5678
MN702-00009-2v0-E