Fujitsu 8FX Hardware Manual page 16

26.4.5 Toggle Bit2 Flag (DQ2) ............................................................................................... 548
26.5 Programming/Erasing Flash Memory .............................................................................. 549
26.5.1 Placing Flash Memory in Read/Reset State ............................................................... 550
26.5.2 Programming Data to Flash Memory .......................................................................... 551
26.5.3 Erasing All Data from Flash Memory (Chip Erase) ..................................................... 553
26.5.4 Erasing Specific Data from Flash Memory (Sector Erase) ......................................... 554
26.5.5 Suspending Sector Erase from Flash Memory ........................................................... 556
26.5.6 Resuming Sector Erase of Flash Memory .................................................................. 557
26.5.7 Unlock Bypass Program ............................................................................................. 558
26.6 Operations ....................................................................................................................... 559
26.7 Flash Security .................................................................................................................. 561
26.8 Registers ......................................................................................................................... 562
26.8.1 Flash Memory Status Register 2 (FSR2) .................................................................... 563
26.8.2 Flash Memory Status Register (FSR) ......................................................................... 566
26.8.3 Flash Memory Sector Write Control Register 0 (SWRE0) .......................................... 569
26.8.4 Flash Memory Status Register 3 (FSR3) .................................................................... 571
26.8.5 Flash Memory Status Register 4 (FSR4) .................................................................... 572
26.9 Notes on Using Dual Operation Flash Memory ............................................................... 580
CHAPTER 27 NON-VOLATILE REGISTER (NVR) INTERFACE ....................... 581
27.1 Overview .......................................................................................................................... 582
27.2 Configuration ................................................................................................................... 583
27.3 Registers ......................................................................................................................... 584
27.3.1 Main CR Clock Trimming Register (Upper) (CRTH) ................................................... 585
27.3.2 Main CR Clock Trimming Register (Lower) (CRTL) ................................................... 586
27.3.3 Main CR Clock Temperature Dependent Adjustment Register (CRTDA) .................. 587
27.3.4 Watchdog Timer Selection ID Register (Upper/Lower) (WDTH/WDTL) ..................... 588
27.4 Notes on Main CR Clock Trimming ................................................................................. 589
27.5 Notes on Using NVR Interface ........................................................................................ 591
CHAPTER 28 COMPARATOR ............................................................................ 593
28.1 Overview .......................................................................................................................... 594
28.2 Configuration ................................................................................................................... 595
28.3 Pins .................................................................................................................................. 597
28.4 Interrupt ........................................................................................................................... 598
28.5 Operations and Setting Procedure Example ................................................................... 599
28.6 Register ........................................................................................................................... 600
28.6.1 Comparator Control Register (CMR0C) ..................................................................... 601
CHAPTER 29 SYSTEM CONFIGURATION CONTROLLER .............................. 603
29.1 Overview .......................................................................................................................... 604
29.2 Register ........................................................................................................................... 605
29.2.1 System Configuration Register (SYSC) ...................................................................... 606
29.3 Notes on Using Controller ............................................................................................... 608
APPENDIX ............................................................................................................. 609
APPENDIX A Instruction Overview ............................................................................................. 610
A.1 Addressing ...................................................................................................................... 613
A.2 Special Instruction ........................................................................................................... 617
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