Toshiba GRL100-701B Instruction Manual page 21

T d = ({T o − (T − T M )}/2 + T dd )/2
The calculated transmission delay time T d1 is divided by the sampling interval T. The mantissa
is truncated and the quotient is expressed as an integer. If the integer is set to P, the reception at
the slave terminal of the signal sent from the master terminal occurs at P sampling intervals from
the transmission. Accordingly, by performing control so that the sampling address of the slave
terminal equals integer P when the sampling address = 0 signal is received from the master
terminal, the sampling address of the slave terminal can be made the same as the master terminal.
Master
terminal
Slave
terminal
Figure 2.2.7.3 Sampling Address Synchronization
2.2.7.2 GPS-based Synchronized Sampling for GPS-MODE
The relays at all terminals simultaneously receive the GPS clock signal once every second.
Figure 2.2.7.4 shows the GPS-based synchronized sampling circuit at one terminal. The GPS
clock signal is received by the GPS receiver HHGP1 and input to a time difference measurement
circuit in the GRL100. The circuit measures the time difference ∆T between the GPS clock and
the internal clock generated from the crystal oscillator. The oscillator is controlled to
synchronize with the GPS clock using the measured ∆T and outputs 2,400 Hz (50Hz rating)
sampling signals to the current sampling circuit (analog to digital converter).
GPS
GPS receiver
HHGP1
(4)
T M
T d1
T O
GRL100
Time
difference
measurement
ΔT
Synchronous control
Figure 2.2.7.4 GPS Clock-based Sampling
 20 
T
T F
T d2
Crystal
Analog/digital
oscillator
converter
Lead/lag control
6 F 2 S 0 8 5 0
t
t
Line