Toshiba GRL100-701B Instruction Manual page 71

A
Z3
A2 Z4
CRL
Z3
B2
Z4
CRL
Figure 2.3.2.7 Current Reversal Phenomenon
Figure 2.3.2.8 shows the current reversal logic. The current reversal logic is picked up on
condition that reverse looking Z4 has operated and forward overreaching zone 2 or zone 3 have
not operated, and the output CRL immediately controls the send signal to a trip block signal and at
the same time blocks local tripping. If the condition above continues longer than 20ms, the output
CRL will last for the TREBK setting even after the condition above ceases to exist.
"Z2"
Z2
[ZONESEL]
Z3
&
"Z3"
Z4
The operation of the current reversal logic and its effect in the event of a fault shown in Figure
2.3.2.7 (a) are as follows. As shown in Figure 2.3.2.7 (b), the current reversal logic of terminal A2
operates (CRL = 1) immediately after the fault occurs. This operation lasts for TREBK setting
even after the current is reversed and Z3 operates, continuously blocking the local tripping and
transmitting a trip block signal to the terminal B2.
Even if overlap arises due to current reversal on the operation of Z3 at terminal A2 and terminal
B2, it will disappear while the current reversal logic is operating, thus avoiding false tripping of
the healthy line of parallel lines. When a current reversal occurs in the direction opposite to the
above, the current reversal logic at terminal B2 will respond similarly.
Current reversal logic is not picked up for internal faults, thus not obstructing high-speed
operation of any protection scheme.
A1
F L1
A2
L2
(a) Direction of fault current
: Before A1 opened
: After A1 opened
t1 t2
(b) Sequence diagram
t 0
20ms 0.01 – 10.00s
Figure 2.3.2.8 Current Reversal Logic
 70 
B1
B
B2
t3
TREBK setting
TREBK setting
TREBK
0 t 866:REV_BLK-A
867:REV_BLK-B
868:REV_BLK-C
≥1
869:REV_BLK-S
865:REV_BLK
6 F 2 S 0 8 5 0
CRL