Toshiba GRL100-701B Instruction Manual page 67

The BOP performs fast tripping for any fault along the whole length of the protected line even if an
open terminal exists. A strong infeed terminal operates for all internal faults even if a weak infeed
terminal exists. Therefore, no echo function is required. However, since no weak infeed logic is
applicable to the BOP, the weak infeed terminal cannot operate.
When a sequential fault clearance occurs for a fault on a parallel line, the direction of the current
on the healthy line is reversed. The status of the forward overreaching element changes from an
operating to a reset state at the terminal where the current is reversed from the inward direction to
outward direction, and from a non-operating status to an operating status at the other terminal. In
this process, if the operating periods of the forward overreaching element of both terminals
overlap, the healthy line may be tripped erroneously. To prevent this, current reversal logic is
provided. (See Section 2.3.2.6 for current reversal.)
Scheme Logic
Figure 2.3.2.4 shows the scheme logic of the BOP. The logic level of transmit signal CS and
receive signal R1-CR or R2-CR is "1" for a trip block signal and "0" for a trip permission signal.
The transmit signal is controlled in the BOP as follows:
In the normal state, the logic level of transmit signal CS is 0, and a trip permission signal is
transmitted. If the reverse looking Z4 operates and at the same time the forward overreaching
element zone 2 or zone 3 selected by the scheme switch [ZONESEL] does not operate, CS
becomes 1 and a trip block signal is transmitted. When this condition continues for 20 ms or more,
current reversal logic is picked up and a drop-off delay time of TREBK setting is given to reset the
transmission of the trip block signal.
Transmission of a trip permission signal continues for the TSBCT setting even after the local
terminal is tripped, assuring command tripping of the remote terminal.
The BOP outputs single-phase tripping signal S-TRIP or three-phase tripping signal M-TRIP to
the local terminal when zone 3 or zone 2 operates and at the same time the trip permission signal is
received (R1-CR=0). The delayed pick-up timer TCHD is provided to allow for the transmission
delay for receipt of the trip block signal from the remote terminal in the event of a forward external
fault.
To select the faulted phase reliably, phase selection is performed using the phase selection element
UVC. The phase selection logic is described in Section 2.3.2.7.
Z4
R1-CR 1
R2-CR 1
≥1
[TERM]
+
"2TERM"
"Z2"
Z2 [ZONESEL]
Z3
"Z3"
[PSB-CR]
PSB
" ON "
NON VTF
Setting
The following shows the setting elements necessary for the BOP and their setting ranges.
For the settings of Z2, Z3 and UVC, refer to Section 2.3.1.
Element Range
Z4S
0.01 - 50.00Ω
(0.1 – 250.0Ω
&
t 0
0.01 – 10.00s
20ms
&
TCHD
t 0
0 - 50ms
Figure 2.3.2.4 BOP Scheme Logic
Step Default
0.01Ω 8.00Ω
0.1Ω 40.0Ω) (*)
 66 
TREBK
≥ 1
&
0 t
&
&
Remarks
Z4 reach
6 F 2 S 0 8 5 0
CS
TSBCT
0 t
0.00 – 1.00s
Phase S-TRIP
Selection
M-TRIP