Table 4-21 Maximum Dsp Clock Frequencies When Using Sram; Table 4-22 Maximum Dsp Clock Frequencies When Using Eprom; Timing Diagrams For Dram Addressing Modes - Motorola DSP56009 User Manual

Table 4-21 shows the maximum DSP clock frequencies while using typical SRAM
devices):

Table 4-21 Maximum DSP Clock Frequencies When Using SRAM

SRAM
MCM6226—25 ns
MCM6206—35 ns
Table 4-22 shows the maximum DSP clock frequencies while using typical EPROMs
using the absolute addressing SRAM mode devices:

Table 4-22 Maximum DSP Clock Frequencies When Using EPROM

EPROM
WS57C256—35 ns
WS57C256—70 ns
WS57C256—90 ns
WS57C256—120 ns
4.8.1

Timing Diagrams for DRAM Addressing Modes

When operating in the DRAM modes, the timing is defined by the ECSR EDTM bit.
The timing is classified as Fast (EDTM = 0) or Slow (EDTM = 1).
MOTOROLA
Max Freq
81 MHz
66 MHz
Max Freq
66 MHz
50 MHz
50 MHz
46 MHz
DSP56009 User's Manual
External Memory Interface
EMI Timing
ESTM[3:0]
0000
0000
ESTM[3:0]
0000
0000
0001
0010
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