Motorola DSP56009 User Manual page 245

24-bit digital signal processor
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Application:
S.A.I.
RLRS Description
0
WSR low identifies Left data word;
WSR high identifies Right data word
1
WSR high identifies Left data word;
WSR low identifies Right data word
RCKP Description
0
Polarity is negative
1
Polarity is positive
RREL Description
0
WSR occurs with 1st bit
1
WSR occurs 1 cycle earlier
RDWT Description
0
First 24 bits transferred
1
Last 24 bits transferred
RXIE
Description
0
Receiver interrupts disabled
1
Receiver interrupts enabled
RXIL
Description
0
Rx interrupt vector location at $1x
1
Rx interrupt vector location at $4x
RLDF Description—Read Only Status Bit
0
Left data register empty
1
Left data register full
RRDF Description—Read Only
0
Right data register empty
1
Right data register full
23
*
0
= Reserved, write as 0
*
Figure B-13 SAI Receiver Control/Status Register (RCS)
MOTOROLA
16
15 14 13 12 11 10
*
RRDF
RLDF
RXIL
RXIE
0
Receiver Control/Status
DSP56009 User's Manual
Date:
Programmer:
RDIR
0
1
9
8
7
6
5
RDWT
RREL
RCKP
RLRS
RDIR
RWL1
Register (RCS)
Programming Reference
Sheet 1 of 4
Description
Data shifted in MSB first
Data shifted in LSB first
RWL1 RWL0 Bits/Word
0
0
16
0
1
24
1
0
32
1
1
Reserved
R0EN Description
0
Receiver 0 disabled
1
Receiver 0 enabled
R1EN Description
0
Receiver 1 disabled
1
Receiver 1 enabled
RMST Description
0
SAI slave
1
SAI master
4
3
2
1
0
*
RWL0
RMST
R1EN
R0EN
0
X:$FFE1 Reset = $0000
B-25

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