Emi Increment Ebar After Read (Einr)—Bit 7 - Motorola DSP56009 User Manual

24-bit digital signal processor
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External Memory Interface
EMI Programming Model
Table 4-8 EMI Maximum DRAM Size (Absolute Addressing)
EAM[3:0]
1101
1101
1101
1101
1110
1110
1110
1110
1110
1110
1110
1110
1111
1111
1111
1111
1111
1111
1111
1111
4.2.7.4
EMI Increment EBAR After Read (EINR)—Bit 7
The read/write control bit EMI Increment EBAR after Read (EINR) enables the
function of incrementing the contents of the relevant EBARx after a read operation. If
EINR is cleared, EBARx will not be modified after read operations. If EINR is set, the
contents of EBARx will be incremented by one after generating the address for the
read operation. This bit affects all operating modes.
Note: EINR is cleared by hardware reset and software reset.
4.2.7.5
EMI Increment EBAR After Write (EINW)—Bit 8
The read/write control bit EMI Increment EBAR after Write (EINW) enables the
function of incrementing the contents of the relevant EBARx after a write operation.
4-16
Bus Width
Word Length
4
8
8
12 or 16
8
20 or 24
4
4
4
4
4
8
8
12 or 16
8
20 or 24
4
4
4
4
4
8
8
12 or 16
8
20 or 24
DSP56009 User's Manual
DRAM devices
256 K × 4
24
2 × 256 K × 4
8
2 × 256 K × 4
2 × 256 K × 4
1 M × 4
8
1 M × 4
12
1 M × 4
16
1 M × 4
20
1 M × 4
24
2 × 1 M × 4
8
2 × 1 M × 4
2 × 1 M × 4
4 M × 4
8
4 M × 4
12
4 M × 4
16
4 M × 4
20
4 M × 4
24
2 × 4 M × 4
8
2 × 4 M × 4
2 × 4 M × 4
(Continued)
Number of
Words
43,690
256 K
128 K
87,381
512 K
349,525
256 K
209,715
174,762
1 M
512 K
349,525
2 M
1,398,101
1 M
838,860
699,050
4 M
2 M
1,398,101
MOTOROLA

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