Motorola DSP56009 User Manual page 230

24-bit digital signal processor
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Programming Reference
Table B-3 Instruction Set Summary (Sheet 4 of 7)
Mnemonic
Syntax
( ± )S,#n,D
( ± )S2,S1,D
MACR
( ± )S1,S2,D
( ± )S,#n,D
MOVE
S,D
No parallel data move
Immediate short
data move
Register to register
data move
Address register update
X memory data move
Register and X memory
data move
Y memory data move
Register and Y memory
data move
— indicates that the bit is unaffected by the operation
* indicates that the bit may be set according to the definition, depending on parallel move conditions
? indicates that the bit is set according to a special definition. See the instruction descriptions in
Appendix A of the DSP56000 Family Manual (DSP56KFAMUM/AD)
0 indicates that the bit is cleared
B-10
Parallel Moves
( no parallel move)
(parallel move)
(parallel move)
( no parallel move)
(.....)
(.....)#xx,D
(.....)S,D
(.....)ea
(.....)X:<ea>,D
(.....)X:<aa>,D
(.....)S,X:<ea>
(.....)S,X:<aa>
(.....)#xxxxxx,D
(.....)X:<ea>,D1
S2,D2
(.....)S1,X:<ea>
S2,D2
(.....)#xxxxxx,D1
S2,D2
(.....)A,X:<ea>
X0,A
(.....)B,X:<ea>
X0,B
(.....)Y:<ea>,D
(.....)Y:<aa>,D
(.....)S,Y:<ea>
(.....)S,Y:<aa>
(.....)#xxxxxx,D
(.....)S1,D1
Y:<ea>,D2
(.....)S1,D1
S2,Y:<ea>
(.....)S1,D1
#xxxxxx,D2
(.....)Y0,A
A,Y:<ea>
(.....)Y0,B
B,Y:<ea>
DSP56009 User's Manual
Instruction
Osc.
Status Request
Program
Clock
Words
Cycles
S L E U N Z V C
1
2
1 + mv
2 + mv * * * * * * * —
1
2
1 + mv
2 + mv * * — — — — — —
mv
mv
— — — — — — — —
mv
mv
— — — — — — — —
mv
mv
* * — — — — — —
mv
mv
— — —— — — — —
mv
mv
* * — — — — — —
mv
mv
* * — — — — — —
mv
mv
* * — — — — — —
mv
mv
* * — — — — — —
Bits:
MOTOROLA

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