Motorola DSP56009 User Manual page 263

24-bit digital signal processor
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A
Address Buses 1-12
Address Generation Unit 1-11
Application Examples C-1
Application Examples — See Appendix D
Applications
Early Reflection Filter C-6
Program Overlay C-5
Single Delay Line C-5
Two Channel Comb Filter C-7
B
Base Address Registers (EMI) 4-7
Bootstrap Flow Chart A-7
bootstrap ROM 1-15
Bootstrap ROM — See Appendix A
Burst Refresh 4-36
C
,
CDP Format 1-19
6-3
Clock and PLL Signals 2-6
Clock Signals 2-6
Comb Filter (Two Channel) C-7
Comb Filter Program C-7
Continuous Refresh 4-36
CPHA and CPOL (HCKR Clock Phase and
Polarity Controls) 5-10
D
Data ALU 1-11
Data Buses 1-12
Data Delay Structure Illustration 4-46
DRAM Absolute Addressing 4-30
Word to Physical Address Mapping 4-31
DRAM Refresh 4-31
Cycle (Fast) Timing Diagram 4-37
Cycle (Slow) Timing Diagram 4-37
Timing 4-35
Timing Requirements 4-35
DRAM Word Address to Physical Address
Mapping 4-28
MOTOROLA
INDEX
E
EAM0-EAM3 (ECSR EMI Addressing
Early Reflection Filter Program C-6
EBARO and EBAR1 (EMI Base Address
EBDF (EMI Data Register Buffer and Data Read
EBRB (EMI Data Register Buffer) 4-9
EBSY (ECSR EMI Busy) 4-19
EBW (ECSR Data Bus Width) 4-10
ECD0-ECD7 (EMI Refresh Clock Divider) 4-22
ECSR (EMI Control/Status Register) 4-10
EDAR0 and EDRR1 (EMI Data Read
EDRF (EMI Data Read Register Full) 4-18
EDTM (EMI DRAM Memory Timing) 4-19
EDWE (EMI Data Write Register Empty) 4-18
EDWR0 and EDWR1 (EMI Data Write
EINR (EMI Increment EBAR After Read) 4-16
EINW (EMI Increment EBAR After Write) 4-16
EIS0-EIS1 (ECSR EMI Read/ Write Interrupt
EME (ECSR EMI Enable) 4-21
EME (EMI Enable) 4-21
EMI 1-18
DSP56009 User's Manual
Mode) 4-12
Registers) 4-7
Register Full) 4-18
Registers) 4-9
Registers) 4-9
Select 4-17
,
4-3
Address Generation 4-23
Address Generation Block Diagram 4-23
Addressing Extension Bits 4-24
Addressing Modes 4-12
Base Address Registers 4-7
Burst Refresh 4-36
Control/Status Register 4-10
Control/Status Register (ECSR) 4-8
Data Read Register 4-9
Data Register Buffer 4-9
Data Write Register 4-9
DRAM
Absolute Addressing 4-30
Absolute Word Storage Locations 4-15
Refresh 4-31
Refresh Timing 4-35
Relative Addressing 4-27
Relative Word Storage Locations 4-14
Timing 4-19
ECSR
Index-1

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