External Memory; Table 1-4 On-Chip Peripheral Memory Map - Motorola DSP56009 User Manual

24-bit digital signal processor
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Overview
DSP56009 Architectural Overview
which are located in the OMR. When in the Bootstrap mode, the first 512 words of
Program RAM are read-disabled but write-accessible. The contents of the bootstrap
ROM are listed in Appendix A.
1.3.3.6

External Memory

The DSP56009 does not extend internal memory off chip. However, external memory
can be added using the EMI. See Section 4,
description of the EMI.
1.3.3.7
Reserved Memory Spaces
The memory spaces marked as reserved should not be accessed by the user. They are
reserved for the expansion of future versions or variants of this DSP. Write
operations to the reserved range are ignored. Read operations from addresses in the
reserved range (with values greater than or equal to $2C00 in X memory space and
$2700 in Y memory space, and values from the reserved area of program memory
space), return the value $000005, which is the opcode for the ILLEGAL instruction. If
a read access is performed from the reserved area below address $2000 in X or Y data
memory, the resulting data will be undetermined. If an instruction fetch is attempted
from addresses in the reserved area, the value returned is $000005, which is the
opcode for the ILLEGAL instruction, causing an illegal instruction interrupt service.
1.3.4
Input/Output
A variety of system configurations are facilitated by the DSP56009 Input/Output
(I/O) structure. Each I/O interface has its own control, status, and double-buffered
data registers that are memory-mapped in the X data memory space (see Table 1-4).
Address
X:$FFFF
Interrupt Priority Register (IPR)
X:$FFFE
Reserved
X:$FFFD
PLL Control Register (PCTL)
X:$FFFC
Reserved
X:$FFFB
Reserved
X:$FFFA
Reserved
X:$FFF9
Reserved
X:$FFF8
Reserved
X:$FFF7
GPIO Control/Data Register (GPIOR)
1-16

Table 1-4 On-chip Peripheral Memory Map

DSP56009 User's Manual
External Memory Interface
Register
for a detailed
MOTOROLA

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