Table 4-6 Emi Maximum Sram Size - Motorola DSP56009 User Manual

Table 4-5 EMI Addressing Modes (Continued)
EAM
Type
[3:0]
2 DRAM
1101
2 DRAM
1110
DRAM
2
1111
Note: 1. In this mode, MCS0 and MA15 are held high. MRAS and MCAS, if enabled, are
active only during DRAM refresh cycles. Devices to be addressed using this mode
should be enabled with some hardware external to the EMI, such as a GPIO pin.
2. In the Absolute Addressing modes, if post-increment of EBAR is enabled and
multiple memory accesses are required for a word transfer, EBAR will be
incremented after each memory access.
The maximum number of word locations that can be stored in the external memory
when using the SRAM addressing modes is shown in Table 4-6 . The maximum
number of word locations that can be stored in the external memory when using the
DRAM, in both Relative and Absolute Addressing modes, is shown in Table 4-7
on page 4-14 and Table 4-8 on page 4-15. When using the 16-bit word length with
24-bit addressing (EWL[2:0] = 011), the number of available word locations is the
same as those for 16-bit word length in the Absolute Addressing modes and the same
as those for 24-bit length in the Relative Addressing modes.
EAM[3:0]
0000
0000
0000
0000
0000
0000
0000
0000
0001 and 0010
MOTOROLA
Address
Addressing
Lines
Absolute MA[8:0]
Absolute MA[9:0]
Absolute MA[10:0]

Table 4-6 EMI Maximum SRAM Size

Bus Width
4
4
4
4
4
8
8
8
4
DSP56009 User's Manual
External Memory Interface
EMI Programming Model
Chip RAS/
Select CAS
na yes
na yes
na yes
Word Length Number of Words
8
12
16
20
24
8
12 or 16
20 or 24
8
Address
Range
256 K
1 M
4 M
16 K
10,922
8 K
6,553
5,461
32 K
16 K
10,922
128 K
4-13