Table 4-5 Emi Addressing Modes; Emi Addressing Mode (Eam[3:0])—Bits 6–3 - Motorola DSP56009 User Manual

External Memory Interface
EMI Programming Model
EWL2 EWL1
0
0
1
1
1
1
4.2.7.3 EMI Addressing Mode (EAM[3:0])—Bits 6–3
The read/write EMI Addressing Mode (EAM[3:0]) control bits select the addressing
mode of the EMI. The addressing modes are shown in Table 4-5 . The values in
EAM[3:0] select which functions will be performed by the EMI pins and if the device
being accessed is an SRAM or DRAM.
Note: EAM[3:0] are cleared by hardware reset and software reset.
EAM
Type
[3:0]
SRAM
1,2
0000
0001 SRAM
0010 SRAM
0011 SRAM
0100 DRAM
0101 DRAM
0110 DRAM
0111 DRAM
10xx
DRAM
2
1100
4-12
Table 4-4 EMI Word Length (Continued)
EWL0
1 0
1 1
0 0
0 1
1 0
1 1

Table 4-5 EMI Addressing Modes

Addressing
Absolute
Relative
Relative
Relative
Relative
Relative
Relative
Relative
Absolute
DSP56009 User's Manual
Word Length
24-bit data word
16-bit data word/24-bit data addressing
Reserved
12-bit data word
20-bit data word
Reserved
Address Chip
Lines Select
MA[14:0] None
MA[17:0] MCS0
MA[16:0] MCS[1:0]
MA[14:0] MCS[3:0]
MA[7:0] na
MA[8:0] na
MA[9:0] na
MA[10:0] na
Reserved
MA[7:0] na
RAS/ Address
CAS Range
Refresh 32 K
only
n.a. 256 K
n.a. 256 K
n.a. 128 K
yes 64 K
yes 256 K
yes 1 M
yes 4 M
yes 64 K
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