Toshiba TLCS-90 Series Data Book page 123

T~J'
8048P I , TMP 8035P I
M"L, ORL
Internal Bus---..........
--l
D
Q
D-Type
Flip-Flop
+5V +5V
CLK
Q
t - r - - - - - - ;
~rite Pulse---r-~----------------~
Inter Buffer
IN
SOkD
Fig.1 Input/Output Circuit of Port 1, Port 2
· Reset initializes all lines to a high impedance "1" state.
50kr2 I/O pins
Port1 or 2
• When external data memory area is not addressed during excution of an
internal prograc, Port 0 (DBO - DB;)
beco~es
a true bidirectional port
(bus)
~ith
associated input and ou:put strobes. If bidirectional feature
n2t needed
Bus
can serve
as
either
a
statically latched output p~rt or
a non-latched input port. However, I/O lines of this port cannot
b~
in termixed •
· As a static port data is written and latched using the OUTL instruction
and inputted using the
INS
instruction these two commands generate
pulses on the corresponding
RD
and
WR
strobe lines.
As a bidirectional port the MOVX instructions are used to read and write
the port which generate the
RD
and
WR
strobes.
• When not being written or read, the Bus lines are ln a high impedance
s ta te •
(4)Timer/Event Counter
• The 8-bit binary up counter can use either of the following frequency
inputs
(1) Internal clock (1/480 of OSC frequency)
••.••..••••• Timer mode
MCU48-113