Stepping Motor Control Ports (P6 And P7) - Toshiba TLCS-90 Series Data Book

TOSHIBA TMP90C840
(Note) The external interrupt INTI occurs at the falling edge of TI4 only
in this pulse width measurement mode (T4MOD4,3 = 10). In any
other mode, the interrupt occurs at its rising edge.
The width of "L" level can be obtained from the difference between the
first C2 and the second CI when the second INTI interrupt is
generated.
QD
Time Qifference measurement
This mode is used to measure the difference in time between the rising
edges of external pulses input through TI4 and TIS.
Keep the I6-bit timer/event counter (Timer 4) counting (free-running)
with the internal clock, and load the UC16 value into CAP 1 at the
rising edge of the input pulse to TI4. Then the interrupt INTI is
generated.
Similarly, the UC16 value is loaded into CAP2 at the rising edge of
the input pulse to TIS, generating the interrupt INT2.
The time difference between these pulses can be obtained from the
difference between the time loading the up-counter value into CAPI and
CAP2.
Count Clock
JUlJlJlJL
(Internal Clock) --
-_JlllJlJllL __ _
Cl
(;2
Input TI4
Input TIS
Loading UC16 into
CAP 1
Loading UC16 into
CAP 2
INTl
INT2
Time Difference
.'
Fig. 3.6 (20) Time Difference measurement
3.7 Stepping Motor control ports (P6 and
pn
The TMP90C840 has two 4-bit hardware stepping motor control ports (SMC
ports MO and Ml) that synchronize with the (8-bit/16-bit) timers. These
SMC ports MO and MI are also used as the I/O ports P6 and P7.
The channel 0 (MO) synchronizes with the trigger signal of the Timer
Flip-flop TFFI, and the channel I (Ml) is synchronous with that of the
Timer Flip-flop TFF3 or TFF4, for output.
MPU90-98