Toshiba TLCS-90 Series Data Book page 330

TOSHIBA TMP90C840
(2) Watchdog timer control register (WDCR)
WDCR
(FFD3H)
This register is used to disable the watchdog timer function and clear
the binary counters.
o Disable WDT
The watchdog timer can be
(WDTE) to "0", writing the
register.
disabled by,
disable code
Clear WDTE to "0".
after
(B1H)
WPMOD
WDCR
<-
O-----XX
<-
10110001
Write disable code (B1H).
clearing WDMOD7
into this WDCR
o Clear binary counter
7
The binary counter can be cleared and resume counting by writing
the clear code (4EH) into the WDCR register.
WDCR
6
<-
01001110
5 4 3
1
Iw
Write clear code (4EH).
2
1
o
1 _ _ _ _ _ _
>
Disable/clear watchdog timer.
B1H 1 Disable code
4EH"1 Clear code
Other
I
Fig. 3.10 (3) Watchdog Timer Control Register
MPU90-132