Toshiba TLCS-90 Series Data Book page 219

TOSHIBA TMP90C840
(5) Special operation and CPU control instruction
Special operations are used to control Register A (DAA, CPL and NEG),
load the data in a relative address into a register (LDAR), control
the carry flag (CCF, SCF and RCF) , mUltiply an 8-bit data by an 8-bit
data and convert the result into a 16-bit representation (MUL) , divide
a 16-bit data by an 8-bit divisor and obtain an 8-bit quotient with an
8-bit residual (DIV), and to nothing (NOP).
If a quotient cannot be represented by an 8-bit number (outside the
0-255. range) or if the divisor is
a
(e. g. , "divide 1, 000 by 0" or
"divide 5,000 by 0"), the overflow flag is set to "1".
CPU control instructions are executed to suspend the CPU operation
(HALT), enable/disable a maskable interrupt (El/DI), and to execute a
software interrupt (SWI).
(6) 16-bit arithmetic and logical operation instruction
The 16-bit arithmetic and logical operation instructions perform
16-bit arithmetic logical operations between the register pair HL and
another register pair, the register pair HL and immediate address, and
the register pair HL and memory (ADD, ADC, SUB, SBC, AND, OR, XOR and
CP), perform an addition between the index registers IX and IY or
Stack Pointer SP and a register pair, or immediate address and memory
(ADD), or increment/decrement the contents of a register pair or
memory by 1 (INC, INCW, DEC, and DECW).
Note that "ADD HL,rr", "ADD ix,gg", "INC rr" and "DEC rr" result in a
different flag status.
(7) Rotate and shift instructions
(8)
The rotate and shift instructions use 8-bit data (RLC, RRC, RL, RR·,
SLA, 8RA, SLL and SRL) or binary-coded decimal (BCD) data (RLD and
RRD).
Bit manipulation instruction
The bit manipulation instructions perform testing,
resetting a particular bit in a register or memory (BIT,
A test and reset instruction (TSET) is als
0
avai lab Ie
multiple tasks.
setting and
SET and RES).
for execut ing
(9) Jump, call and return instructions
A jump instruction can be used, in addition to the register indirect,
index, register index, and extended addressing modes, in the 8-bit and
16-bit relat ive addressing modes. Note, however, that the 16-bit
relative addressing mode can be used only for an unconditional jump
instruction.
A call instruction uses the 16-bit relative addressing mode, as well
as the register indirect, index, register index, and extended
addressing modes. Again, 16-bit relative addressing mode is only
applicable to an unconditional call instruction.
Return instructions contain unconditional return instruction,
conditional return instruction and RETI instruction for return back
from the interrupt processing.
These instructions pop up the program counter PC and the register pair
AF from the stack. 16 condition codes and over 16 mnemonics are used
in these instructions, because certain flags have more than one
meaning (e.g. Z and EQ, NZ and NE, PE and OV, PO and NOV).
MPU90-21