Toshiba TLCS-90 Series Data Book page 154

TOSHIBA
(2) External input clock form Tl terminal
(minimum cycle time 3 x ALE cycle)
TMP8049PI-6,TM?8039PI-6
Event Counter mode
The counter is presettable and readable with two MOV instructions
which transfer the content of the accumulator to the counter and vice
versa. The counter content is not affected by a Reset and is initialized
solely by the MOVT, A instruction. The counter is stopped by a Reset or
STOP TCNT ins t ruct ion and rema ins stopped unt i 1 s ta rt ed by START T
instruction or as an event counter by a START CNT. Once started the
counter will increment to its maximum count (FF) and overflow to Zero
continuing its count until stopped by a STOP TCNT instruction or RESET.
The increment from maximum count to Zero -(overflow) results in the setting
of an overflow flag and the generation of an interrupt request. When
interrupt acknowledged a subroutine call to Location 7 will be initiated.
Location 7 should store the starting address of the timer or counter
service routine. The state of the overflow flag is testable with the
conditional JUMP (JTF). The flag is reset by excuting a JTF or by RESET.
Figure 2
illus~rates
the concept of the timer circuit.
Timer
XTAL/15
1/32
Pre-scaler
Cleared on Start Timer
JTF Instruction
8-Bit Timer/
Counter
IT
Timer Interrupt
Request Flip-Ylop
Tl
Edge Detector
Read/Write Enable
U.-rr
Timer Interrupt Enable
Fig.2 Concept of Timer Circuit
MCU48-l44