Toshiba TLCS-90 Series Data Book page 87

8 bit microcontroller
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TOSHIBA
HALT MODE
• I HALT INSTRUCTION
TMP 80 C49AP / -6, TMP 80 C39AP / -6, TMP 80C49AF /-6,
TMP80C49AT,TMP80C39AT
OP code is "OIH".
HALT INSTRUCTION is an additional instruction to the
standard 8048/8049 instruction set.
· 2 Entry to HALT MODE
On the
execution of HALT INSTRUCTION,
TMP80C49A/TMP80C39A enter
HALT
MODE.
• 3 Status in HALT MODE
The oscillator continues its operation, however, the internal clocks and
. internal logic values just prior to the execution of HALT INSTRUCTION are
maintained.
Power consumption in HALT MODE is less than 50% of normal
operation.
The status of each pins are described in the following table.
• 4 Release from HALT MODE
HALT MODE is released by either of two signals (RESET,INT).
(1)
RESET Release Mode : An active RESET input signal causes the normal reset
function.
TMP80C49A/TMP80C39A start tne program at address "000 H".
(2)
INT Release Mode : An active INT input signal causes the normal oper-
ation.
In case of interrupt enable mode (EI MODE), TMP80C49A/TMP80C39A execute
the interrupt service routine, after the execution of one instruction
which is located at the next address after HALT INSTRUCTION.
In case of interrupt disable mode (DI MODE), TMP80C49A/TMP80C39A execute
normal operation from the next address after HALT INSTRUCTION.
• 5 Supply Voltage Range in HALT MODE
The operating supply voltage range and the operating temperature range
are same as in normal operation.
MCU48-77

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