Toshiba TLCS-90 Series Data Book page 316

8 bit microcontroller
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TOSHIBA
SIOCLK
RxD
Sampling
Timing
IRFRX
RTS
TMP90C840
When the last bit (parity bit or MSB) of l-frame data is received by
the receiving unit, the RTS pin turns to the "H" level to request
the transmission unit to halt transmission.
When the CTS pin turned to the "H" level,
the transmission unit
halts transmission, after completing the current data transmission,
until the pin turns to the "L" level.
At this time, the interrupt
INTTX is generated, to request the CPU to transfer data.
Then the
data is written into the transmission buffer, and the CPU is placed
in
~he
standby mode.
When the received data are read by the receiving unit, the RTS pin
returns
to
the
"L"
leve
1 ,
req ue sting
that
the
transmis s ion
is
restarted.
TMP90C840
TMP90C840
\.J
\.J
TxD
RxD
- -
- -
CTS
RTS
Transmission unit
Receiving unit
Fig. 3.8 (8)
Hand-shake Function
1
2 3 4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
=>< ____________
E_n_d __ B_i_t ______
~~--~~--------------------------.J)(stoP
bit
(Note)
In case of 8-bit asynchronous communication (UART), the last bit
is the bit 7 in the non-parity mode, and the parity bit in the
parity-added mode ••
Fig. 3.8
(9)
Timing Chart of RTS (request to send) Signal
MPU90-118

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