Toshiba TLCS-90 Series Data Book page 61

8 bit microcontroller
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TOSHIBA
TMP 80 C48AP / -6, TMP 80 C3SAP / -6, TMP 80 C48AF / -6,
TMP80C48AT,TMP80C3SAT
POWER DOWN MODE (I) ••••••••• Data Hold Mode in RAM
The operation of oscillation circuit is
suspended by setting
Ps
terminal
to
low level after RESET terminal has been set to low level.
Consequently, all
the data in RAM area can be held in low power consumption.
The minimum hold voltage of VCC in this mode is 2V.
PS terminal
is
set
to
~
level
to resume
oscillation after VCC has
been
reset to SV, and then RESET terminal is set to high level, thus,
the normal
mode is restarted from the initialize operation (address 0).
DC CHARACTERISTICS
TMP 80 C48AP /3SAP ,TMP 80 C48AF , TMP 80 C48AT / 3SAT: TOP R=O • C to 70· C, VS S=OV
TMP80C48AP-6/3SAP-6,TMP80C48AF-6
TOPR=-40·C to 8S·C, VSS=OV
, SYMBOL
I
PARAMETER
,
TEST CONDITION
, MIN., TYP., MAX., UNIT'
, - ,
,
,
,
1
1
1
1 VSBl
1 Standby Voltage(l)
1 _ _ _ _ _ _ _ _ _ _ 1 2.0 ,
1 6.0 1
V
1
1
1
IVCC=SV,VIH=VCC-0.2V,
1 - - 1 - - 1 - - 1 - - 1
1 ISBl 1 Standby Current(l) IVIL=0.2V
1
1
0.5
I
10
1 lJA
1
AC CHARACTERISTICS
TMP 80 C48AP /3SAP, TMP80C48AF, TMP 80 C48AT /3SAT: TOPR=O· C to 70· C, VSS=OV
TMP80C48AP-6/3SAP-6,TMP80C48AF-6
: TOPR=-40·C to 8S·c,VCC=SV±20%,VSS=OV
1 SYMBOL'
PARAMETER
1 TEST CONDITION' MIN. 1 Typ.1 MAX. 1 UNIT 1
1
I
I
I
I
I
I
1
1 tPSHR IPower Save Hold Time
(RESET)
1
1 10
1
1
1
lJS 1
1
1
1
1
1
1
1
1
1 tPSSR IPower Save Setup Time
(RES"ET)
1
1 10
1
1
1
mS 1
1
1
1
1
1
1
1
1
I
tVH
1 VCC Hold Time
(Ps)
I
l S I
1
1
lJS 1
I
I
I
1
I
1
1
I
I
tVS
I
VCC Setup Time (PS)
I
I
S
I
1
I
lJS
I
Note: tCY=2.SlJS (fXTAL=6MHz)
TIMING WAVEFORM
Vee
-~
j~
~
"
tVH
tvs
\
"
I
."
. .
r-
~
IP-
"
-""
.,
tpSHR
tpSSR
MCU48-S1

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