Toshiba TLCS-90 Series Data Book page 151

TOSHIBA
TMP 8049PI -6) TMP 8039PI-6
There are three locations 1n Program Memory of special importance.
• Location 0
Address
4095
2048
2047
Bank
1
Memory Bank 0
Program Me!:lor'Y Area
Activating the Reset line of the processor causes the first instruc-
tion to be fetched from Location
O.
• Location 3
Activating the interrupt line of the processor (if interrupt enabled)
causes a jump to subroutine defined by address held in Location 3.
• Location 7
A timer/counter interrupt resulting from a timer/counter overflow
(if enabled) causes a jump to a subroutine defined by address held in
Location
7.
• Program address
0-2047
and
2048-4095
are called memory banks
0
and
1
respectively switching of memory banks is achieved by changing the
most significant bit of the program counter (PC) during execution of
an unconditional jump instruction or call instruction executed after
using SEL MBO or SEL MBI.
Reset operation automatically selects Bank
O.
(2) Data Memory
Resident Data Memory (volatile RAM) is organized as
128
words by 8-bits
wide •
• The first 8 locations (0 -7) of the memory array are designated as
working registers and are directly addressable by several
instructions. By executing a Register Bank switch instruction (SEL
RBI) locations 24 - 31 are designated as the working registers in
place of 0 - 7.
MCU48-I4l