Toshiba TLCS-90 Series Data Book page 131

TOSHIBA
XI/Il.l 1np\lt
(6HHz)
¢l
(2MHz)
Generated
internally ¢2
State
ALE
(400KHz)
P20 - P23
DBO - DB7
ALE
1
Instruction
Fetch
(500ns)
1
Statt?
2
Decode
3
Execution
(2.5lJ
sec)
Fig.4
Instruction Cycle Timing
Address
TMP8048PI,THP8035PI
4 5 1
Execution Execution
r
Next Address Latch Timing
Address
Address
L
Fig. 5 Timing of External Program Memory Access
MCU48-121