Toshiba TLCS-90 Series Data Book page 124

TOSHIBA
(2) External input clock form T1 terminal
(minimum cycle time 3 x ALE cycle)
TMr 8048PI ,TMP B035PI
..........•.• Event Counter mode
The CQunter is presettable and readable with two MOV instructions
which transfer the content of the accumulator to the counter and vice
versa. The counter content is not affected by a Reset and is initialized
solely
by
the MOVT, A instruction. The counter is stopped
by
a Reset or
STOP TCNT instruction and remains stopped until started by START T
instruction or as an event counter by a START CNT. Once started the
counter v,ii
11
increment to its maximum count
(FF)
and overflow to Zero
continuing its count until stopped by a STOP TCNT instruction or RESET.
The increment from maximum count to Zero (overflow) results in the setting
of an overflow flag and the generation of an interrupt request. When
interrupt acknowledged a subroutine call to Location 7 will be initiated.
Location
7
should store the starting address of the timer or counter
service routine. The state of the overflow flag is testable with the
conditional JUM? (JTF).
The flag is reset by excuting a JTF or by RESET.
Figure 2
illu~trates
the concept of the timer
circui~.
XTAL/IS
1/32
Pre-scaler
Cleared on Start Timer
Edge Detector
8-Bit Timer!
Counter
n
Read/Write Enable
Fig.2 Concept of Timer Circuit
MCU48-114
JTF Instruction
Timer Interrupt
Request Flip-Flop
INT
Timer Interrupt Enable