Toshiba TLCS-90 Series Data Book page 29

TOSHIBA TMP 8048A/TMP 8035A, TMP 8049A/TMP 8039A
• Figure 6 illustrates the tlmlng of accessing the external data memory
during execution of external program.
(3) Interface with I/O Expander (TMP8243P)
. The
T~8048A
I/O can be easily expanded using the TMP8243 I/O Expander.
This device uses only the lower half 4-bits of Port 2 for communica-
tion with the
T~8048A.
The TMP8243 contains for 4-bit I/O ports which
serve as extensions of
on~
chip I/O and are addressed as Ports (4-7).
All communication takes place over the lower half of port 2 (P20 - P23)
with timing provided by an output pulse on the PROG pin. Each transfer
consists of two 4-bit nibbles the first containing the "OP Code" and
port address and second containing the actual 4-bits of data.
+12V
EA
o~r------------------------------------------------------
mET
OV
------------~!~/----~~
ALE
DBO -
DB7
"
,
;
Input of Internal
ROM Address
J(
Output of Internal
ROM Data
P20. P21
Input of Internal ROM Address
Input of Internal
ROM Address
Input of Internal
ROM Address
Fig.
7
Timing of Reading Internal Program Memory
5V
SV
10K
SV n
s
o
t------
74
JO-........
- - - t T R
Q
AtE
Fig. 8(a) Single Step Circuit
MCU48-19