Table 19.5 Interrupt Exception Handling Sources And Priority Order - Hitachi SH7750 Hardware Manual

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Table 19.5 Interrupt Exception Handling Sources and Priority Order

Interrupt Source
NMI
IRL3–IRL0 = 0 H'200
IRL
IRL3–IRL0 = 1 H'220
IRL3–IRL0 = 2 H'240
IRL3–IRL0 = 3 H'260
IRL3–IRL0 = 4 H'280
IRL3–IRL0 = 5 H'2A0
IRL3–IRL0 = 6 H'2C0
IRL3–IRL0 = 7 H'2E0
IRL3–IRL0 = 8 H'300
IRL3–IRL0 = 9 H'320
IRL3–IRL0 = A H'340
IRL3–IRL0 = B H'360
IRL3–IRL0 = C H'380
IRL3–IRL0 = D H'3A0
IRL3–IRL0 = E H'3C0
IRL0
IRL1
IRL2
IRL3
H-UDI
H-UDI
GPIO
GPIOI
DMAC
DMTE0
DMTE1
DMTE2
DMTE3
2
DMTE4 *
2
DMTE5 *
2
DMTE6 *
2
DMTE7 *
DMAE
INTEVT
Interrupt Priority
Code
(Initial Value)
H'1C0
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1
15–0 (13) *
H'240
1
15–0 (10) *
H'2A0
1
15–0 (7) *
H'300
1
15–0 (4) *
H'360
H'600
15–0 (0)
H'620
15–0 (0)
H'640
15–0 (0)
H'660
H'680
H'6A0
H'780
H'7A0
H'7C0
H'7E0
H'6C0
IPR (Bit
Priority within
Numbers)
IPR Setting Unit
1
IPRD (15–12) *
1
IPRD (11–8) *
1
IPRD (7–4) *
1
IPRD (3–0) *
IPRC (3–0)
IPRC (15–12) —
IPRC (11–8)
High
Low
Rev. 6.0, 07/02, page 759 of 986
Default
Priority
High
Low

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