Pin Configuration (Sh7750, Sh7750S); Table 14.1 Dmac Pins - Hitachi SH7750 Hardware Manual

14.1.3

Pin Configuration (SH7750, SH7750S)

Tables 14.1 and 14.2 show the DMAC pins.

Table 14.1 DMAC Pins

Channel Pin Name
0 DMA transfer
request
DREQ acceptance
confirmation
DMA transfer end
notification
1 DMA transfer
request
DREQ acceptance
confirmation
DMA transfer end
notification
Abbreviation I/O
DREQ0
Input
DRAK0 Output
DACK0 Output
DREQ1
Input
DRAK1 Output
DACK1 Output
Function
DMA transfer request input from
external device to channel 0
Acceptance of request for DMA
transfer from channel 0 to external
device
Notification to external device of start
of execution
Strobe output to external device of
DMA transfer request from channel 0
to external device
DMA transfer request input from
external device to channel 1
Acceptance of request for DMA
transfer from channel 1 to external
device
Notification to external device of start
of execution
Strobe output to external device of
DMA transfer request from channel 1
to external device
Rev. 6.0, 07/02, page 493 of 986