Serial Control Register (Scscr1) - Hitachi SH7750 Hardware Manual

Sh7750 series superh risc engine
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17.2.3

Serial Control Register (SCSCR1)

Bits 1 and 0 of SCSCR1 have a different function in smart card interface mode.
Bit:
Initial value:
R/W:
Bits 7 to 4: Operate in the same way as for the normal SCI. See section 15, Serial Communication
Interface (SCI), for details.
Bits 3 and 2—Reserved: Not used with the smart card interface.
Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): These bits specify the function of the SCK
pin. In smart card interface mode, an internal clock is always used as the clock source. In smart
card interface mode, it is possible to specify a fixed high level or fixed low level for the clock
output, in addition to the usual switching between enabling and disabling of the clock output.
GM
CKE1
0
0
1
1
0
1
Rev. 6.0, 07/02, page 708 of 986
7
6
TIE
RIE
TE
0
0
R/W
R/W
R/W
CKE0
SCK Pin Function
0
Port I/O pin
1
Clock output as SCK output pin
0
Invalid setting: must not be used
1
Invalid setting: must not be used
0
Output pin with output fixed low
1
Clock output as output pin
0
Output pin with output fixed high
1
Clock output as output pin
5
4
3
RE
0
0
0
R/W
R/W
2
1
CKE1
CKE0
0
0
R/W
R/W
R/W
0
0

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