Block Diagram (Sh7750, Sh7750S) - Hitachi SH7750 Hardware Manual

Sh7750 series superh risc engine

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Block Diagram (SH7750, SH7750S)

Figure 14.1 shows a block diagram of the DMAC.

DACK0, DACK1

DRAK0, DRAK1

External bus

DMAC operation register

DMAC source address

DMAC destination address register

DMATCRn: DMAC transfer count register

DMAC channel control register

Rev. 6.0, 07/02, page 492 of 986

Figure 14.1 Block Diagram of DMAC

DTR command buffer

Request controller

SAR0, DAR0, DMATCR0,

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Sh7750r Sh7750s