Register Descriptions; Instruction Register (Sdir) - Hitachi SH7750 Hardware Manual

Sh7750 series superh risc engine

Hide thumbs Also See for SH7750:

Table of Contents

Register Descriptions

The instruction register (SDIR) is a 16-bit register that can only be read by the CPU. In the initial

state, bypass mode is set. The value (command) is set from the serial input pin (TDI). SDIR is

initialized by the TRST pin or in the TAP Test-Logic-Reset state. When this register is written to

from the H-UDI, writing is possible regardless of the CPU mode. However, if a read is performed

by the CPU while writing is in progress, it may not be possible to read the correct value. In this

case, SDIR should be read twice, and then read again if the read values do not match. Operation is

undefined if a reserved command is set in this register.

SH7750, SH7750S:

Initial value:

Initial value:

Bits 15 to 12—Test Instruction Bits (TI3–TI0)

Bits 11 to 0—Reserved: These bits are always read as 1, and should only be written with 1.

H-UDI reset negate

H-UDI reset assert

H-UDI interrupt

(Initial value)

Rev. 6.0, 07/02, page 803 of 986

Table of Contents

Sh7750r Sh7750s