Register Configuration; Table 21.2 H-Udi Registers - Hitachi SH7750 Hardware Manual

the rating of the pull-up resistor on port-pin f. Although this current has no effect on the
chip's operation, unnecessary current will be dissipated.
The maximum frequency of TCK (TMS, TDI, TDO) is 20 MHz. Make the TCK or SH7750 Series
CPG setting so that the TCK frequency is lower than that of the SH7750 Series' on-chip
peripheral module clock.
21.1.4

Register Configuration

Table 21.2 shows the H-UDI registers. Except for SDBPR, these registers are mapped in the
control register space and can be referenced by the CPU.

Table 21.2 H-UDI Registers

Abbre-
Name viation
Instruction SDIR
register
Data register SDDR/
H SDDRH
Data register SDDRL R/W H'FFF0000A H'1FF0000A 16
L
Bypass SDBPR —
register
Interrupt SDINT
source
4
register *
Boundary SDBSR —
scan register * 4
Notes: *1 Initialized when the TRST pin goes low or when the TAP is in the Test-Logic-Reset
state.
*2 The value read from H-UDI is fixed (H'FFFFFFFD).
*3 Using the H-UDI interrupt command, a 1 can be written to the least significant bit.
*4 SH7750R only
Rev. 6.0, 07/02, page 802 of 986
CPU Side
P4 Area 7
R/W Address Address
R H'FFF00000 H'1FF00000 16
R/W H'FFF00008 H'1FF00008 32/16
— —
R/W H'FFF00014 H'1FF00014 16
— —
Access Initial
1
Value *
Size R/W
H'FFFF R/W
Unde- —
fined
Unde- —
fined
— Unde- R/W
fined
W *
H'0000
— Unde- R/W
fined
H-UDI Side
Access Initial
1
Value *
Size
32 H'FFFFFFFD
(Fixed
2
value *
)
— —
— —
1 —
3
32 H'00000000
— Undefined