Table 5-26. Logical Input Table (8 Registers 128 Elements) - ABB TPU2000 Technical Manual

THRUFA – Through Fault Alarm – This alarm is actuated by the Disturbance pickup setting.

Table 5-26. Logical Input Table (8 Registers 128 Elements)

Address
41153 Logical Output
Bit 15 = DIFF
Bit 14 = SELF CHECK ALARM
Bit 13 = 87T
Bit 12 = 87H
Bit 11 = 2HROA
Bit 10 = 5HROA
Bit 9 = AHROA
Bit 8 = TCFA
Bit 7 = TFA
Bit 6 = 51P1
Bit 5 = 51P2
Bit 4 = 50-P1 (Note 1)
Bit 3 = 150P-1 (Note 1)
Bit 2 = 50-P2 (Note 1)
Bit 1 = 150P-2 (Note 1)
Bit 0 = 51N-1 (Note 1) (lsb)
41154 Logical Output
Bit 15 = 51G-2 (Note 1)
Bit 14 = 50N-1 (Note 1)
Bit 13 = 150N-1 (Note 1 )
Bit 12 = 50G-2 (Note 1)
Bit 11 =150G-2 (Note 1)
Bit 10 = 46-1 (Note 1)
Bit 9 = 46-2 (Note 1)
Bit 8 = 87T-D (Note 1)
Bit 7 = 87H-D (Note 1)
Bit 6 = 51P-1D (Note 1)
Bit 5 = 51P-2D (Note 1)
Bit 4= 51N-1D (Note 1)
Bit 3 =51G-2D (Notes 1, 2)
Bit 2= 50P-1D (Note 1)
Bit 1= 50P-2D (Note 1)
Bit 0 = 50N-1D (Note 1)
41155 Logical Output
Bit 15 =50G-2D (Note 1,2)
Bit 14 =150P-1D
Bit 13 =150P-2D
Bit 12 =150N-1D
Bit 11 =150G-2D (Notes 1,2)
Bit 10 = 46-1D
Bit 9 = 46-2D
Bit 8 = PATA
Bit 7 = PBTA
TPU2000/2000R Modbus/Modbus Plus Automation Guide
Item
Unsigned Integer 16 Bits
Differential Trip Alarm (msb leftmost bit)
0 = Fault, 1 = Normal Diagnostic Alarm
Harmonic Restrained % Differential Trip Alarm
Unrestrained High Set Instantaneous Differential Trip Alarm
nd
2
th
5
All Harmonics Restraint Alarm
Trip Coil Failure Alarm (Trip Circuit Open =1)
Trip Failure Alarm (Trip Not Cleared within Trip Fail Dropout Set)
Winding 1 Phase Time Overcurrent Trip Alarm
Winding 2 Phase Time Overcurrent Trip Alarm
st
1
nd
2
st
1
nd
2
Winding 1 Neutral Time Overcurrent Trip Alarm (lsb rightmost bit)
Unsigned Integer 16 Bits
st
1
st
1
nd
2
st
1
nd
2
Winding 1 Negative Sequence Time Overcurrent Trip Alarm
Winding 2 Negative Sequence Time Overcurrent Trip Alarm
Percentage Differential Function Disabled Alarm
High Set Instantaneous Function Disabled Alarm
Winding 1 Phase Time Overcurrent Function Disabled Alarm
Winding 1 Phase Time Overcurrent Function Disabled Alarm
Winding 1 Neutral Time Overcurrent Function Disabled Alarm
Winding 2 Ground Time Overcurrent Function Disabled Alarm
st
1
Disabled Alarm
st
1
Disabled Alarm
st
1
Disabled Alarm (lsb rightmost bit)
Unsigned Integer 16 Bit
Winding 2 Ground Time Overcurrent Function Disabled Alarm
(msb leftmost bit)
nd
2
Disabled Alarm
nd
2
Disabled Alarm
nd
2
Disabled Alarm
nd
2
Disabled Alarm
Winding 1 Negative Sequence Time Overcurrent Function
Disabled Alarm
Winding 2 Negative Sequence Time Overcurrent Function
Disabled Alarm
Phase A Target Alarm
Phase B Target Alarm
Harmonic Restraint Alarm
Harmonic Restraint Alarm
Winding Phase 1 Instantaneous Overcurrent Trip Alarm
Winding 1 Phase Instantaneous Overcurrent Trip Alarm
Winding Phase 2 Instantaneous Overcurrent Trip Alarm
Winding 2 Phase Instantaneous Overcurrent Trip Alarm
Winding 2 Ground Time Trip Alarm (msb leftmost bit)
Winding 1 Neutral Instantaneous Trip Alarm
Winding 1 Neutral Instantaneous Overcurrent Trip Alarm
Winding 2 Ground Instantaneous Trip Alarm
Winding 2 Ground Instantaneous Overcurrent Trip Alarm
Winding 1 Phase Instantaneous Overcurrent Function
Winding 2 Phase Instantaneous Overcurrent Function
Winding 1 Neutral Instantaneous Overcurrent Function
Winding 1 Phase Instantaneous Overcurrent Function
Winding 2 Phase Instantaneous Overcurrent Function
Winding 1 Neutral Instantaneous Overcurrent Function
Winding 2 Ground Instantaneous Overcurrent Function
Description
105