ABB TPU2000 Technical Manual page 285

5/3
6/1
6/2
6/3
7/1
7/2
7/3
8/1
8/2
8/3
9/1
9/2
9/3
4 Transmit Buffer "N" Commands ( 3 4 n )
N
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
4.1 Transmit Programmable Input Select and Index ( 3 4 1 )
Bit = 0, Physical Input is selected.
Bit = 1, Physical Input is not selected.
Low byte consists of bits 0 through 7.
High byte consists of bits 8 through 15.
Index byte is the offset into the TPU's logical input structure.
Offset
00 87T
01 87H
02 51P-1
03 51P-2
04 51N-1
05 51G-2
06 50P-1
07 50P-2
08 50N-1
09 50G-2
10 150P-1
11 150P-2
12 150N-1
13 150G-2
14 46-1
15 46-2
TPU2000/2000R Modbus/Modbus Plus Automation Guide
Aux Port Parameter 4 byte (0-255)
Aux Port Parameter 5 byte (0-255)
Aux Port Parameter 6 byte (0-255)
Aux Port Parameter 7 byte (0-255)
Aux Port Parameter 8 byte (0-255)
Aux Port Parameter 9 byte (0-255)
Aux Port Parameter 10 byte (0-255)
Aux Port Parameter Mode byte
Spare
Spare
Spare
Checksum high byte
Checksum low byte
Definition
Reserved for repeat 3 4 n
Programmable Input Select and Index Tables
Programmable Input Negated AND Table
Programmable Input AND/OR Table
Programmable Input User Defined Input Names
Programmable Output Select Table
Programmable Output AND/OR Table
Programmable Output User Defined Output Strings
Primary Relay Settings
Alternate 1 Relay Settings
Alternate 2 Relay Settings
Configuration Settings
Counter Settings
Alarm Settings
Real Time Clock
Output Delays
Definitions
Restrained Differential Trip
High Set Inst Differential Trip
Wdg1 Phase Time OC Trip
Wdg2 Phase Time OC Trip
Wdg1 Neutral Time OC Trip
Wdg2 Ground Time OC Trip
1st Wdg1 Phase Inst OC Trip
1st Wdg2 Phase Inst OC Trip
1st Wdg1 Neutral Inst OC Trip
1st Wdg2 Ground Inst OC Trip
2nd Wdg1 Phase Inst OC Trip
2nd Wdg2 Phase Inst OC Trip
2nd Wdg1 Neutral Inst OC Trip
2nd Wdg2 Ground Inst OC Trip
Wdg1 Neg Seq Time OC Trip
Wdg2 Neg Seq Time OC Trip
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