Siemens SINUMERIK 840D sl Function Manual page 220

Connecting Sensors/Actuators
7.3 Safe programmable logic (SPL)
Signals
The PLC-SPL signals are in DB18 and are sub-divided into
1. Parameterization part, and
2. Data area/status.
Parameterization part
SPL_READY:
The SPL_READY = TRUE signal indicates that the commissioning phase has
been completed, i.e. if a crosswise data comparison error has occurred, the basic
program sends a "STOP D/E" to all the axes.
STOP_MODE:
For crosswise comparison error:
0 = external STOP D
1 = external STOP E
to the drive
Data area/status
SPL_DATA
The useful (net) data for the PLC-SPL is contained in the SPL_DATA structure.
The useful data area is sub-divided into internal inputs/outputs and marker areas
and external inputs/outputs that correspond to the hardware I/Os.
With the appropriate parameterization for external inputs/outputs, the basic pro-
gram transfers the input image of the I/Os to the external inputs in DB 18 and from
the external outputs in DB 18 to the output.
SPL_DELTA
The SPL_DELTA area is used for diagnostics. A signal with the status TRUE in this
area means that the signal is different in the NCK and PLC at this bit position.
CMDSI
Signal CMDSI can be used to extend the timeout value in the crosswise SPL data
comparison by a factor of 10. This extension is used for long forced checking pro-
cedure pulses or single-channel test stop logic functions.
STATSI
A crosswise data comparison error is indicated in STATSI. STATSI contains the
number of the signal whose signal difference caused this error. The error number
(1–320) refers to SPL_DATA as an array with 5x64=320 signals.
7-220
SINUMERIK 840D sl/SINAMICS S120 SINUMERIK Safety Integrated (FBSI sl) – 03.2006 Edition
© Siemens AG, 2006. All rights reserved
03.06