Toshiba TLCS-900/L1 Series Manual page 107

Original cmos 16-bit microcontroller
Hide thumbs Also See for TLCS-900/L1 Series:
Table of Contents

Advertisement

(2) 16-bit timer mode
A 16-bit interval timer is configured by pairing the two 8-bit timers TMRA0 and
TMRA1.
To make a 16-bit interval timer in which TMRA0 and TMRA1 are cascaded
together, set TA01MOD<TA01M1:0> to 01.
In 16-bit timer mode, the overflow output from TMRA0 is used as the input clock
for TMRA1, regardless of the value set in TA01MOD<TA01CLK1:0>. Table 3.7.2
shows the relationship between the timer (Interrupt) cycle and the input clock
selection.
LSB 8 bits set to TA0REG and MSB 8 bits set to TA1REG. Please keep setting
TA0REG first because setting data for TA0REG inhibit its compare function and
setting data for TA1REG permit it.
Example: To generate an INTTA1 interrupt every 0.24 [s] at fc = 33 MHz, set
the timer registers TA0REG and TA1REG as follows:
* Clock state
If φT16 ((2
/fc)s at 33 MHz) is used as the input clock for counting, set the following
7
value in the registers: 0.24 s ÷ (2
(e.g., set TA1REG to F4H and TA0REG to 24H).
As a result, INTTA1 interrupt can be generated every 0.24 [s].
The comparator match signal is output from TMRA0 each time the up counter UC0
matches TA0REG, though the up counter UC0 is not be cleared and also INTTA0 is
not generated.
In the case of the TMRA1 comparator, the match detect signal is output on each
comparator pulse on which the values in the up counter UC1 and TA1REG match.
When the match detect signal is output simultaneously from both the comparators
TMRA0 and TMRA1, the up counters UC0 and UC1 are cleared to 0 and the interrupt
INTTA1 is generated. Also, if inversion is enabled, the value of the timer flip-flop
TA1FF is inverted.
Example: When TA1REG = 04H and TA0REG = 80H
Value of up counter
(UC1, UC0)
TMRA0 comparator match
detect signal
TMRA0 comparator match
detect signal
INTTA0
INTTA1
TA1OUT
Figure 3.7.12 Timer Output by 16-Bit Timer Mode
System clock:
High frequency (fc)
Clock gear:
1 (fc)
Prescaler clock: f
/fc)s ≈ 62500 = F424H
7
0080H
0180H
0280H
91C824-105
TMP91C824
FPH
0080H
0380H
0480H
Inversion
2008-02-20

Advertisement

Table of Contents
loading

This manual is also suitable for:

Tmp91c824fgJtmp91c824-s

Table of Contents